Analytical Thermal Model Of A Generic Multi-layer Spacerless 3D Package

Abstract

Analytical Thermal Model of a Generic Multi-Layer Spacerless 3D Package Abstract The need for more functions in a single device has lead to die stacking architecture. Although the number of functional die increases further to accommodate package functionality, the overall package dimensions have not increased, they have stayed the same or decreased. Recently, Samsung announce a 16 die stacked device. In order to keep the same package height, alternate stacking structures need to be investigated. One suck opportunity is spacerless die stacking architecture. Using dummy silicon spacers add cost to a package and do not increase the memory of functionality. Spacerless architecture reducers the package height by eliminating spacers or dummy dice. This allow for an increased number if active die to be stacked directly on one another without changing the overall package height, or in come cases reducing the package height. Previous work (Haji-Sheikh et al) has been done to develop steady-State heat conduction model in multi-layer bodies. This model will be extended to the results of the current study to increase the number of layers considering giving the temperature field for a generic spacerless three dimensional packages (3DP). The computation will account for the contact resistance created by the die attach and the solder balls as well as the boundary conditions. Finally Validation of this analytical developed model will be carried out with a numerical model.