EXPERIMENTAL AND COMPUTATIONAL BOARD LEVEL RELIABILITY ASSESSMENT OF THICK BOARD QFN ASSEMBLIES UNDER POWER CYCLING
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Date
2016-05-11Author
Krishnamurthy, Sumanth
0000-0002-6857-8760
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Quad Flat No-Lead Package (QFN) is one of the latest cutting edge technologies that took the industry by storm due to its excellent electrical and thermal performance, compact size and low cost. Due to its compact size, QFN package is an ideal choice for handheld portable applications and where package performance is required. In QFN packages, the electrical contact to the Printed Circuit Board (PCB) is made through soldering of the lands underneath the package body rather than the traditional leads formed along the perimeter. However, using thick PCBs can be detrimental to the reliability of the package. The motivation of this work is to understand the reliability of such packages under power cycling and mitigate failures.
Fatigue failure of solder interconnects is a major reliability concern in electronic packaging. Traditionally, accelerated thermal cycling (ATC) have long been performed to assess reliability of solder interconnects. In real life applications, the actual package (or assembly) is experiencing Power Cycling (PC) apart from environmental temperature fluctuations, which exhibits non-uniform temperature distribution throughout the assembly having chip as the only heat source. In this study, the plastic work induced in the solder joints is assessed by subjecting the package through power cycling. Plastic work can be used to estimate the number of cycles it requires to initiate and propagate the crack inside the solder joint. ANSYS workbench is used for Finite Element (FE) modelling of the package under study. The orthotropic material properties of the PCB for the ANSYS model are determined experimentally using Thermomechanical Analysis (TMA), Dynamic Mechanical Analysis (DMA) and Instron MicroTester. The analysis includes solving a model with the quarter symmetry QFN model under PC. The effect of Coefficient of Thermal Expansion (CTE) of the PCB was studied to assess the reliability of the package.