Show simple item record

dc.contributor.authorInamdar, Jaydeep Vijayen_US
dc.date.accessioned2008-08-08T02:31:07Z
dc.date.available2008-08-08T02:31:07Z
dc.date.issued2008-08-08T02:31:07Z
dc.date.submittedMarch 2008en_US
dc.identifier.otherDISS-2006en_US
dc.identifier.urihttp://hdl.handle.net/10106/922
dc.description.abstractThe latest scalable video coding standard, H.264/SVC uses many components of H.264/AVC standard to maintain backward compatibility and also has proposed many tools to support scalable video coding with increased coding efficiency. SIP Analyzer is one such tool incorporated in JSVM (Joint Scalable Video Model) software which is the reference software for the SVC project. SIP Analyzer implements Selective Interlayer Prediction strategy to encode the bitstream so as to improve coding performance in scenarios where multiple adaptation is not needed without losing much if the same bitstream is used in scenario where multiple adaptation is needed. Core of this algorithm is a 0-1 Knapsack Problem that decides the right combination of lower layer frames for which interlayer prediction can be safely turned off. Current implementation solves the Knapsack Problem using Dynamic Programming approach. Even though it gives optimal solution to the problem, it is computationally complex to be implemented in real time encoders. In this thesis we attempt to solve the problem using Greedy heuristic approach. Since it's a heuristic approach, solution given by it may differ from the optimal solution. We evaluate the performance of Greedy heuristic approach both qualitatively and quantitatively and summarize the observations which can serve as reference for the developers. It has been verified that Greedy heuristic approach greatly reduces the SIP analyzer complexity both in time and in space without compromising much with the quality.en_US
dc.description.sponsorshipOraintara, Soontornen_US
dc.language.isoENen_US
dc.publisherElectrical Engineeringen_US
dc.titlePerformance Evaluation Of Greedy Heuristic For SIP Analyzer In H.264/SVCen_US
dc.typeM.S.en_US
dc.contributor.committeeChairOraintara, Soontornen_US
dc.degree.departmentElectrical Engineeringen_US
dc.degree.disciplineElectrical Engineeringen_US
dc.degree.grantorUniversity of Texas at Arlingtonen_US
dc.degree.levelmastersen_US
dc.degree.nameM.S.en_US
dc.identifier.externalLinkhttps://www.uta.edu/ra/real/editprofile.php?onlyview=1&pid=286
dc.identifier.externalLinkDescriptionLink to Research Profiles


Files in this item

Thumbnail


This item appears in the following Collection(s)

Show simple item record