Browsing Library by Author "Liu, Hsiao-Hsuan"

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Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect

Pei, Zhenlin; Mayahinia, Mahta; Liu, Hsiao-Hsuan; Tahoori, Mehdi; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (ACM, 2023-06-05)

For on-chip SRAM, a major portion of delay and energy is contributed by the H-Tree interconnects. In this paper, we propose an E-Tree interconnect technology to minimize the H-Tree delay and energy overheads based on an ...

Browsing Library by Author "Liu, Hsiao-Hsuan"

Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect ﻿

Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect