COMPARATIVE STUDY OF VISCOELASTIC MODELING AND LINEAR MODELING FOR WAFER LEVEL CHIP SCALE PACKAGE UNDER DROP IMPACT

Abstract

Wafer level chip scale packages are one the preferred choice in the electronic industry to meet the need of new miniaturization of the recent devices. It has high efficiency in packaging and has low cost. On the other hand, the drop impact failure is one of the growing risk in day to day use of the portable devices. Therefore, to ensure product quality and to integrate more complicated functionality in these devices comprehensive reliability tests need to be performed before delivering the product. Accelerated thermal cycling, drop testing and power cycling are some accepted test methods used to access board level reliability. The printed circuit boards used for various packages are modeled as orthotropic elastic material. However, PCB substrate materials are macromolecule resins, which are typical viscoelastic in nature. So, assigning viscoelastic properties would me more appropriate for performing the reliability tests. Dynamic Mechanical Analyzer(DMA) is used to characterize the viscoelastic material properties of the PCB’s. The frequency and temperature dependent complex moduli are also obtained from DMA are used to model the PCB’s as viscoelastic material in ANSYS workbench. Drop test is performed and the results obtained are compared to those obtained from orthotropic elastic modelling of PCB’s.