Browsing MS Theses - DO NOT EDIT by Author "Ahmad, Ishfaq"
Now showing items 1-3 of 3
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A Dynamic Multi-Threaded Queuing Mechnism for Reducing the Inter-Process Communication Latency on Multi-Core Chips
Mishra, Rohitshankar Vijay Shankar V; 0000-0002-5754-6894 (2019-08-12)Reducing latency in Inter-Process Communication (IPC) is one of the key challenges in multi-threaded applications in multi-core environments. High latencies can have serious impact on the performance of an application when ... -
Dynamic Cache Reconfiguration For Energy Optimization In Chip Multiprocessors
Puri, Gaurav (Computer Science & Engineering, 2012-07-25)Cache reconfiguration for chip multiprocessors (CMP) in order to reduce energy consumption is a challenging research problem. This thesis presents a dynamic scheme for level one cache design where the processing core can ... -
Solving The Rubik's Cube With Parallel Processing
Nargolkar, Aslesha Pramod (Computer Science & Engineering, 2007-08-23)This thesis investigates parallel processing techniques for solving the 3 x 3 x 3 Rubik's Cube. We explore various state-space search based algorithmic approaches to optimally solve the Cube. The parallel processing approach ...