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dc.contributor.advisor | Kim, Choong Un | |
dc.contributor.advisor | Koh, Seong Jin | |
dc.creator | Gothe, Pushkar Kiran | |
dc.date.accessioned | 2023-06-28T15:16:34Z | |
dc.date.available | 2023-06-28T15:16:34Z | |
dc.date.created | 2022-08 | |
dc.date.issued | 2022-08-17 | |
dc.date.submitted | August 2022 | |
dc.identifier.uri | http://hdl.handle.net/10106/31374 | |
dc.description.abstract | The Fermi-Dirac thermal excitation of electrons at room temperature has been a significant limitation to many technologically important phenomena such as single electron transport. The electron thermal excitation also degrades the performance of modern electronic devices as well as spintronic devices. The scaling of metal-oxide-semiconductor field-effect transistors (MOSFETs) is hindered due to the thermal excitation of electrons at room temperature. Suppression of the thermally excited electrons at room temperature would therefore enable further scaling of the transistors, and in turn, improve the performance of electronic devices.
This study demonstrates the suppression of electron thermal excitation at room temperature without using cryogenic cooling. This is done using a quantum well discrete energy level as an electron energy filter. The energy filter is placed between a source electrode and silicon, where the thermally excited electrons in the source are filtered out by a quantum well state and the energy-filtered cold electrons are injected to silicon. The energy filtering stack consists of a thin quantum well layer (~3nm/4nm/5nm SnO2) bounded by tunneling barrier 1 (~0.5nm Al2O3 or 1nm Si3N4) and tunneling barrier 2 (~1.5nm Native SiO2). This energy filtering structure has enabled cold-electron injection to silicon, with an effective electron temperature of ~0.08 Kelvin at room temperature. The current-voltage measurements show abrupt current jumps at specific voltages, which correspond to the alignment of a quantum well discrete energy level with the silicon conduction band edge. The differential conductance plot for the observed abrupt current jumps shows an extremely narrow peak, with a full width at half maximum (FWHM) of ~0.025 mV, corresponding to an effective electron temperature of ~0.08 Kelvin at room temperature. The cold-electron injection to silicon opens possibilities for extremely energy-efficient transistors with subthreshold slope values significantly below the room-temperature subthreshold slope limit of 60mV/decade, e.g., 2mV/decade (corresponding to an effective electron temperature of ~10 Kelvin). | |
dc.format.mimetype | application/pdf | |
dc.language.iso | en_US | |
dc.subject | Cold electron transport | |
dc.subject | Suppression of thermally excited electrons | |
dc.subject | Quantum well | |
dc.subject | Discrete energy levels | |
dc.title | Study of Electron Energy Filtering for Cold Electron Transport at Room Temperature | |
dc.type | Thesis | |
dc.date.updated | 2023-06-28T15:16:34Z | |
thesis.degree.department | Materials Science and Engineering | |
thesis.degree.grantor | The University of Texas at Arlington | |
thesis.degree.level | Doctoral | |
thesis.degree.name | Doctor of Philosophy in Materials Science and Engineering | |
dc.type.material | text | |
dc.creator.orcid | 0000-0002-8471-3889 | |
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