Charge Pump Circuit

Abstract

The sole aim of this work is to show how to generate higher voltages greater than the power supply voltage. This idea is implemented using transistors and capacitors on silicon and is called a charge pump circuit. A charge pump circuit is implemented as a voltage doubler circuit in this work using 0.25um gate length technology. A 6-stage Dickson charge pump circuit was designed to produce a 15 V output from a 5 V supply using two phase non-overlapping clock signals that drive the charge pump. It also describes the advanced architectures with complex circuit design and dynamic techniques for improving efficiency in low voltage operations. EEPROMs, flash memories, power management blocks, audio and video codec, image sensor circuits and displays require voltages greater than the supply voltage and it needs to be generated on a chip. An on chip charge pump circuit provides an excellent solution in comparison with a power hungry switch capacitor or inductor based linear regulators in these systems. The charge pump circuit is a basic block of a phase lock loop (PLL) and a delay lock loop (DLL)