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STUDY OF CRACK PROPAGATION UNDER THERMAL LOADING ON A 3D TSV PACKAGE
(2016-09-16)
Today, there is a revolution in going for miniaturization in size of electronic packages. More thinner, lighter and complex packages are in use for almost every electronic device. This initiation was taken to the next level ...
Reliability of a 2.5D TSV package
(2018-08-13)
In the recent years, the Through Silicon Vias (TSVs) are helping a huge variety of the 3D IC and the 2.5D IC packaging applications to try to fulfill their requirements of functionality and higher connectivity at the expense ...
STRUCTURAL OPTIMIZATION & RELIABILITY OF 3D PACKAGE BY STUDYING CRACK BEHAVIOR ON TSV & BEOL & IMPACT OF POWER CYCLING ON RELIABILITY FLIP CHIP PACKAGE
(2018-04-12)
The 3D packaging is stacked of chips on top of another which is emerging as a powerful technology that satisfies such integrated circuit (IC) package demands. Most of the stress develops at interfaces and the interface ...
Estimation of Fracture Mechanics Parameters In 3D TSV Package During Chip Attachment Process
(2015-11-24)
Nowadays, the packaging of electronic products is becoming revolutionized, since the packages are becoming more and more complex, dense, thinner and lighter for greater portability. Miniaturization of packages is being ...